C8051F80X_14 Datasheet, PDF (112/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
SFR Definition 18.7. IT01CF: INT0/INT1 Configuration
Bit
Name
Type
Reset
7
IN1PL
R/W
0
6
5
4
IN1SL[2:0]
R/W
0
0
0
3
IN0PL
R/W
0
2
1
0
IN0SL[2:0]
R/W
0
0
1
SFR Address = 0xE4
Bit Name
Function
7
IN1PL _{INT1 Polarity.}
0: INT1 input is active low.
1: INT1 input is active high.
6:4 IN1SL[2:0] _{INT1 Port Pin Selection Bits.}
These bits select which Port pin is assigned to INT1. Note that this pin assignment is
independent of the Crossbar; INT1 will monitor the assigned Port pin without disturb-
ing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar
will not assign the Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P0.0
001: Select P0.1
010: Select P0.2
011: Select P0.3
100: Select P0.4
101: Select P0.5
110: Select P0.6
111: Select P0.7
3
IN0PL _{INT0 Polarity.}
0: INT0 input is active low.
1: INT0 input is active high.
2:0 IN0SL[2:0] _{INT0 Port Pin Selection Bits.}
These bits select which Port pin is assigned to INT0. Note that this pin assignment is
independent of the Crossbar; INT0 will monitor the assigned Port pin without disturb-
ing the peripheral that has been assigned the Port pin via the Crossbar. The Crossbar
will not assign the Port pin to a peripheral if it is configured to skip the selected pin.
000: Select P0.0
001: Select P0.1
010: Select P0.2
011: Select P0.3
100: Select P0.4
101: Select P0.5
110: Select P0.6
111: Select P0.7
112
Rev. 1.0