C8051F80X_14 Datasheet, PDF (69/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
12.1. Comparator Multiplexer
C8051F80x-83x devices include an analog input multiplexer to connect Port I/O pins to the comparator
inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 12.3). The CMX0P3–
CMX0P0 bits select the Comparator0 positive input; the CMX0N3–CMX0N0 bits select the Comparator0
negative input. Important Note About Comparator Inputs: The Port pins selected as comparator inputs
should be configured as analog inputs in their associated Port configuration register, and configured to be
skipped by the Crossbar (for details on Port configuration, see Section “23.6. Special Function Registers
for Accessing and Configuring Port I/O” on page 152).
CPT0MX
P0.0
P0.2
P0.4
P0.6
P1.0
P1.2
P1.4
P1.6
VREG Output
VDD
CP0 +
+
CP0 -
-
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
P1.7
VREG Output
GND
Note: P1.4-P1.7
are not available
on the 16-pin
packages.
Figure 12.3. Comparator Input Multiplexer Block Diagram
Rev. 1.0
69