C8051F80X_14 Datasheet, PDF (108/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
SFR Definition 18.4. EIE2: Extended Interrupt Enable 2
Bit
7
6
5
4
3
2
1
0
Name
ECSGRT ECSCPT
Type
R
R
R
R
R
R
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xE7
Bit Name
Function
7:2 Unused Read = 000000b; Write = don’t care.
1 ECSGRT Enable Capacitive Sense Greater Than Comparator Interrupt.
0: Disable Capacitive Sense Greater Than Comparator interrupt.
1: Enable interrupt requests generated by CS0CMPF.
0 ECSCPT Enable Capacitive Sense Conversion Complete Interrupt.
0: Disable Capacitive Sense Conversion Complete interrupt.
1: Enable interrupt requests generated by CS0INT.
108
Rev. 1.0