C8051F80X_14 Datasheet, PDF (93/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
15.1. Program Memory
The members of the C8051F80x-83x device family contain 16 kB (C8051F80x and C8051F810/1), 8 kB
(C8051F812/3/4/5/6/7/8/9 and C8051F82x), or 4 kB (C8051F830/1/2/3/4/5) of re-programmable Flash
memory that can be used as non-volatile program or data storage. The last byte of user code space is
used as the security lock byte (0x3FFF on 16 kB devices, 0x1FFF on 8 kB devices and 0x0FFF on 4 kB
devices).
C8051F80x and
C8051F810/1 (16kB)
Lock Byte
Lock Byte Page
0x3FFF
0x3FFE
0x3E00
Flash Memory Space
C8051F812/3/4/5/6/7/8/9
and C8051F82x (8 kB)
Lock Byte
Lock Byte Page
0x1FFF
0x1FFE
0x1E00
Flash Memory Space
C8051F830/1/2/3/4/5 (4 kB)
Lock Byte
Lock Byte Page
0x0FFF
0x0FFE
0x0E00
Flash Memory Space
0x0000
0x0000
Figure 15.2. Flash Program Memory Map
0x0000
15.1.1. MOVX Instruction and Program Memory
The MOVX instruction in an 8051 device is typically used to access external data memory. On the
C8051F80x-83x devices, the MOVX instruction is normally used to read and write on-chip XRAM, but can
be re-configured to write and erase on-chip Flash memory space. MOVC instructions are always used to
read Flash memory, while MOVX write instructions are used to erase and write Flash. This Flash access
feature provides a mechanism for the C8051F80x-83x to update program code and use the program mem-
ory space for non-volatile data storage. Refer to Section “19. Flash Memory” on page 113 for further
details.
15.2. Data Memory
The members of the C8051F80x-83x device family contain 512 bytes (C8051F80x, C8051F81x, and
C8051F820/1/2/3) or 256 bytes (C8051F824/5/6/7/8/9 and C8051F830/1/2/3/4/5) of RAM data memory.
For all C8051F80x-83x devices, 256 bytes of this memory is mapped into the internal RAM space of the
8051. For the devices with 512 bytes of RAM, the remaining 256 bytes of this memory is on-chip “external”
memory. The data memory map is shown in Figure 15.1 for reference.
15.2.1. Internal RAM
There are 256 bytes of internal RAM mapped into the data memory space from 0x00 through 0xFF. The
lower 128 bytes of data memory are used for general purpose registers and scratch pad memory. Either
direct or indirect addressing may be used to access the lower 128 bytes of data memory. Locations 0x00
through 0x1F are addressable as four banks of general purpose registers, each bank consisting of eight
byte-wide registers. The next 16 bytes, locations 0x20 through 0x2F, may either be addressed as bytes or
as 128 bit locations accessible with the direct addressing mode.
The upper 128 bytes of data memory are accessible only by indirect addressing. This region occupies the
same address space as the Special Function Registers (SFR) but is physically separate from the SFR
space. The addressing mode used by an instruction when accessing locations above 0x7F determines
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