C8051F80X_14 Datasheet, PDF (142/251 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F80x-83x
Table 23.2. Port I/O Assignment for Digital Functions
Digital Function
Potentially Assignable Port Pins
UART0, SPI0, SMBus,
SYSCLK, PCA0 (CEX0-2
and ECI), T0, or T1.
Any pin used for GPIO
Any Port pin available for assignment by the
Crossbar. This includes P0.0 - P1.7² pins which
have their PnSKIP bit set to 0.¹
P0.0–P2.0²
Notes:
1. The Crossbar will always assign UART0 pins to P0.4 and P0.5.
2. Port pins P1.4–P1.7 are not available on the 16-pin packages.
SFR(s) used for
Assignment
XBR0, XBR1
PnSKIP
23.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions
External digital event capture functions can be used to trigger an interrupt or wake the device from a low
power mode when a transition occurs on a digital I/O pin. The digital event capture functions do not require
dedicated pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP
= 0). External digital event capture functions cannot be used on pins configured for analog I/O. Table 23.3
shows all available external digital event capture functions.
Table 23.3. Port I/O Assignment for External Digital Event Capture Functions
Digital Function
Potentially Assignable Port Pins
External Interrupt 0
External Interrupt 1
Port Match
P0.0–P0.7
P0.0–P0.7
P0.0–P1.7^*
Note: Port pins P1.4–P1.7 are not available on the 16-pin packages.
SFR(s) used for
Assignment
IT01CF
IT01CF
P0MASK, P0MAT
P1MASK, P1MAT
142
Rev. 1.0