C8051F58X Datasheet, PDF (83/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFR Definition 9.5. CPT2CN: Comparator2 Control
Bit
Name
Type
Reset
7
CP2EN
R/W
0
6
CP2OUT
R
0
5
CP2RIF
R/W
0
4
CP2FIF
R/W
0
3
2
CP2HYP[1:0]
R/W
0
0
1
0
CP2HYN[1:0]
R/W
0
0
SFR Address = 0x9A; SFR Page = 0x10
Bit
Name
Function
7
CP2EN Comparator2 Enable Bit.
0: Comparator2 Disabled.
1: Comparator2 Enabled.
6 CP2OUT Comparator2 Output State Flag.
0: Voltage on CP2+ < CP2–.
1: Voltage on CP2+ > CP2–.
5
CP2RIF Comparator2 Rising-Edge Flag. Must be cleared by software.
0: No Comparator2 Rising Edge has occurred since this flag was last cleared.
1: Comparator2 Rising Edge has occurred.
4
CP2FIF Comparator2 Falling-Edge Flag. Must be cleared by software.
0: No Comparator2 Falling-Edge has occurred since this flag was last cleared.
1: Comparator2 Falling-Edge has occurred.
3:2 CP2HYP[1:0] Comparator2 Positive Hysteresis Control Bits.
00: Positive Hysteresis Disabled.
01: Positive Hysteresis = 5 mV.
10: Positive Hysteresis = 10 mV.
11: Positive Hysteresis = 20 mV.
1:0 CP2HYN[1:0] Comparator2 Negative Hysteresis Control Bits.
00: Negative Hysteresis Disabled.
01: Negative Hysteresis = 5 mV.
10: Negative Hysteresis = 10 mV.
11: Negative Hysteresis = 20 mV.
Rev. 1.2
83