C8051F58X Datasheet, PDF (197/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFR Definition 20.4. XBR3: Port I/O Crossbar Register 3
Bit
Name
Type
Reset
7
T5EXE
R/W
0
6
5
4
T5E
T4EXE
T4E
R/W
R/W
R/W
0
0
0
3
ECI1E
R/W
0
2
1
0
PCA1ME[2:0]
R/W
R/W
R/W
0
0
0
SFR Address = 0xC6; SFR Page = 0x0F
Bit
Name
Function
7
T5EXE T5EX Enable.
0: T5EX unavailable at Port pin.
1: T5EX routed to Port pin
6
T5EX T5E Enable.
0: T5E unavailable at Port pin.
1: T5E routed to Port pin
5
T4EXE T4EX Enable.
0: T4EX unavailable at Port pin.
1: T4EX routed to Port pin
4
T5EX T4E Enable.
0: T4E unavailable at Port pin.
1: T4E routed to Port pin
3
ECI1E PCA1 External Counter Input Enable.
0: ECI1 unavailable at Port pin.
1: ECI1 routed to Port pin.
2:0 PCA1ME[2:0] PCA1 Module I/O Enable Bits.
000: All PCA1 I/O unavailable at Port pins.
001: CEX6 routed to Port pin.
010: CEX6, CEX7 routed to Port pins.
011: CEX6, CEX7, CEX8 routed to Port pins.
100: CEX6, CEX7, CEX8, CEX9 routed to Port pins.
101: CEX6, CEX7, CEX8, CEX9, CEX10 routed to Port pins.
110: CEX6, CEX7, CEX8, CEX9, CEX10, CEX11 routed to Port pins.
111: RESERVED
Rev. 1.2
197