C8051F58X Datasheet, PDF (347/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFR Definition 29.5. PCA1L: PCA1 Counter/Timer Low Byte
Bit
7
6
5
4
3
2
1
0
Name
PCA1[7:0]
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xF9; SFR Page = 0x10
Bit Name
Function
7:0 PCA1[7:0] PCA1 Counter/Timer Low Byte.
The PCA1L register holds the low byte (LSB) of the 16-bit PCA1 Counter/Timer.
SFR Definition 29.6. PCA1H: PCA1 Counter/Timer High Byte
Bit
7
6
5
4
3
2
1
0
Name
PCA1[15:8]
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xFA; SFR Page = 0x10
Bit Name
Function
7:0 PCA1[15:8] PCA1 Counter/Timer High Byte.
The PCA1H register holds the high byte (MSB) of the 16-bit PCA1 Counter/Timer.
Reads of this register will read the contents of a “snapshot” register, whose contents
are updated only when the contents of PCA1L are read (see Section 29.1).
Rev. 1.2
347