C8051F58X Datasheet, PDF (4/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
12.2.1.2. Bit Addressable Locations ............................................................ 105
12.2.1.3. Stack .......................................................................................... 105
13. Special Function Registers................................................................................. 106
13.1. SFR Paging ................................................................................................... 106
13.2. Interrupts and SFR Paging ............................................................................ 106
13.3. SFR Page Stack Example ............................................................................. 107
14. Interrupts .............................................................................................................. 126
14.1. MCU Interrupt Sources and Vectors.............................................................. 126
14.1.1. Interrupt Priorities.................................................................................. 127
14.1.2. Interrupt Latency ................................................................................... 127
14.2. Interrupt Register Descriptions ...................................................................... 129
14.3. External Interrupts INT0 and INT1................................................................. 136
15. Flash Memory....................................................................................................... 138
15.1. Programming The Flash Memory .................................................................. 138
15.1.1. Flash Lock and Key Functions .............................................................. 138
15.1.2. Flash Erase Procedure ......................................................................... 138
15.1.3. Flash Write Procedure .......................................................................... 139
15.1.4. Flash Write Optimization ....................................................................... 139
15.2. Non-volatile Data Storage ............................................................................. 140
15.3. Security Options ............................................................................................ 140
15.4. Flash Write and Erase Guidelines ................................................................. 142
15.4.1. V_DD Maintenance and the V_DD monitor ................................................ 142
15.4.2. PSWE Maintenance .............................................................................. 142
15.4.3. System Clock ........................................................................................ 143
16. Power Management Modes................................................................................. 147
16.1. Idle Mode....................................................................................................... 147
16.2. Stop Mode ..................................................................................................... 148
16.3. Suspend Mode .............................................................................................. 148
17. Reset Sources ...................................................................................................... 150
17.1. Power-On Reset ............................................................................................ 151
17.2. Power-Fail Reset/VDD Monitor ..................................................................... 152
17.3. External Reset ............................................................................................... 153
17.4. Missing Clock Detector Reset ....................................................................... 153
17.5. Comparator0 Reset ....................................................................................... 154
17.6. PCA Watchdog Timer Reset ......................................................................... 154
17.7. Flash Error Reset .......................................................................................... 154
17.8. Software Reset .............................................................................................. 154
18. External Data Memory Interface and On-Chip XRAM ....................................... 156
18.1. Accessing XRAM........................................................................................... 156
18.1.1. 16-Bit MOVX Example .......................................................................... 156
18.1.2. 8-Bit MOVX Example ............................................................................ 156
18.2. Configuring the External Memory Interface ................................................... 157
18.3. Port Configuration.......................................................................................... 157
18.4. Multiplexed and Non-multiplexed Selection................................................... 162
18.4.1. Multiplexed Configuration...................................................................... 162
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Rev. 1.2