C8051F58X Datasheet, PDF (129/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
Table 14.1. Interrupt Summary
Interrupt Source
Interrupt Priority
Vector Order
Pending Flag
Enable Priority
Flag Control
UART1
0x0093 18
RI1 (SCON1.0)
TI1 (SCON1.1)
Y N ES1
PS1
(EIE2.3) (EIP2.3)
Programmable Coun- 0x009B 19
ter Array 1
Comparator2
0x00A3 20
CF (PCA1CN.n)
Y N EPCA1 PPCA1
CCFn (PCA1CN.n)
(EIE2.4) (EIP2.4)
CP2FIF (CPT2CN.4) N N ECP2
PCP2
CP2RIF (CPT2CN.5)
(EIE2.5) (EIP2.5)
Timer 4 Overflow
0x00AB 21
TF4H (TMR4CN.7)
TR4L (TMR4CN.6)
N N ET4
PT4
(EIE2.6) (EIP2.6)
Timer 5 Overflow
0x00B3 22
TF5H (TMR5CN.7)
TF5L (TMR5CN.6)
N N ET5
PT5
(EIE2.7) (EIP2.7)
*Note: The LIN0INT bit is cleared by setting RSTINT (LINCTRL.3)
14.2. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described in this section.
Refer to the data sheet section associated with a particular on-chip peripheral for information regarding
valid interrupt conditions for the peripheral and the behavior of its interrupt-pending flag(s).
Rev. 1.2
129