C8051F58X Datasheet, PDF (329/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFR Definition 28.5. PCA0L: PCA0 Counter/Timer Low Byte
Bit
7
6
5
4
3
2
1
0
Name
PCA0[7:0]
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xF9; SFR Page = 0x00
Bit Name
Function
7:0 PCA0[7:0] PCA0 Counter/Timer Low Byte.
The PCA0L register holds the low byte (LSB) of the 16-bit PCA0 Counter/Timer.
Note: When the WDTE bit is set to 1, the PCA0L register cannot be modified by software. To change the contents of
the PCA0L register, the Watchdog Timer must first be disabled.
SFR Definition 28.6. PCA0H: PCA0 Counter/Timer High Byte
Bit
7
6
5
4
3
2
1
0
Name
PCA0[15:8]
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xFA; SFR Page = 0x00
Bit Name
Function
7:0 PCA0[15:8] PCA0 Counter/Timer High Byte.
The PCA0H register holds the high byte (MSB) of the 16-bit PCA0 Counter/Timer.
Reads of this register will read the contents of a “snapshot” register, whose contents
are updated only when the contents of PCA0L are read (see Section 28.1).
Note: When the WDTE bit is set to 1, the PCA0H register cannot be modified by software. To change the contents of
the PCA0H register, the Watchdog Timer must first be disabled.
Rev. 1.2
329