C8051F58X Datasheet, PDF (280/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 26.8. SPI Master Timing (CKPHA = 0)
SCK*
MISO
T
MCKH
T
MCKL
T
MIS
T
MIH
MOSI
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 26.9. SPI Master Timing (CKPHA = 1)
280
Rev. 1.2