C8051F58X Datasheet, PDF (306/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
Counter/Timer with Capture mode is selected by setting the Capture/Reload Select bit CPRLn
(TMRnCN.0) and the Timer 4 and 5 Run Control bit TRn (TMRnCN.2) to logic 1. The Timer 4 and 5 respec-
tive External Enable EXENn (TMRnCN.3) must also be set to logic 1 to enable captures. If EXENn is
cleared, transitions on TnEX will be ignored.
2
SYSCLK
12
External Clock
(XTAL1)
Tn
8
0
1
Crossbar
TRn
EXENn
TnE
Crossbar
X
TMRnCF
TTTTD
n nOnC
MMGO E
10nEn
0xFF
0xFF
Toggle Logic
0
1
Tn
(Port Pin)
TCLK ^{TMRnL TMRnH}
TMRnCAPL TMRnCAPH
CP/RLn
C/Tn
TRn
EXENn
EXFn
TFn
Interrupt
Figure 27.10. Timer 4 and 5 Capture Mode Block Diagram
27.4.3. Auto-Reload Mode
In Auto-Reload mode, the counter/timer can be configured to count up or down and cause an interrupt/flag
to occur upon an overflow/underflow event. When counting up, the counter/timer will set its overflow/under-
flow flag (TFn) and cause an interrupt (if enabled) upon overflow/underflow, and the values in the
Reload/Capture Registers (TMRnCAPH and TMRnCAPL) are loaded into the timer and the timer is
restarted. When the Timer External Enable Bit (EXENn) bit is set to 1 and the Decrement Enable Bit
(DCENn) is 0, a falling edge (1-to-0 transition) on the TnEX pin will cause a timer reload. Note that timer
overflows will also cause auto-reloads. When DCENn is set to 1, the state of the TnEX pin controls
whether the counter/timer counts up (increments) or down (decrements), and will not cause an auto-reload
or interrupt event. See Section 27.4.1 for information concerning configuration of a timer to count down.
When counting down, the counter/timer will set its overflow/underflow flag (TFn) and cause an interrupt (if
enabled) when the value in the TMRnH and TMRnL registers matches the 16-bit value in the Reload/Cap-
ture Registers (TMRnCAPH and TMRnCAPL). This is considered an underflow event, and will cause the
timer to load the value 0xFFFF. The timer is automatically restarted when an underflow occurs.
Counter/Timer with Auto-Reload mode is selected by clearing the CPRLn bit. Setting TRn to logic 1
enables and starts the timer. In Auto-Reload Mode, the External Flag (EXFn) toggles upon every overflow
or underflow and does not cause an interrupt. The EXFn flag can be used as the most significant bit (MSB)
of a 17-bit counter.
306
Rev. 1.2