C8051F58X Datasheet, PDF (128/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
Table 14.1. Interrupt Summary
Interrupt Source
Interrupt Priority
Vector Order
Pending Flag
Enable Priority
Flag Control
Reset
External Interrupt 0
(INT0)
Timer 0 Overflow
External Interrupt 1
(INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow
SPI0
0x0000 Top
0x0003 0
0x000B 1
0x0013 2
0x001B 3
0x0023 4
0x002B 5
0x0033 6
SMB0
0x003B 7
ADC0 Window Com- 0x0043 8
pare
ADC0 Conversion
0x004B 9
Complete
Programmable Coun- 0x0053 10
ter Array 0
Comparator0
0x005B 11
Comparator1
0x0063 12
Timer 3 Overflow
0x006B 13
LIN0
0x0073 14
Voltage Regulator
Dropout
CAN0
0x007B 15
0x0083 16
Port Match
0x008B 17
None
IE0 (TCON.1)
N/A N/A Always Always
Enabled Highest
Y Y EX0 (IE.0) PX0 (IP.0)
TF0 (TCON.5)
IE1 (TCON.3)
Y Y ET0 (IE.1) PT0 (IP.1)
Y Y EX1 (IE.2) PX1 (IP.2)
TF1 (TCON.7)
Y Y ET1 (IE.3) PT1 (IP.3)
RI0 (SCON0.0)
Y N ES0 (IE.4) PS0 (IP.4)
TI0 (SCON0.1)
TF2H (TMR2CN.7) Y N ET2 (IE.5) PT2 (IP.5)
TF2L (TMR2CN.6)
SPIF (SPI0CN.7)
Y N ESPI0
PSPI0
WCOL (SPI0CN.6)
(IE.6)
(IP.6)
MODF (SPI0CN.5)
RXOVRN (SPI0CN.4)
SI (SMB0CN.0)
Y N ESMB0 PSMB0
(EIE1.0) (EIP1.0)
AD0WINT
Y N EWADC0 PWADC0
(ADC0CN.3)
(EIE1.1) (EIP1.1)
AD0INT (ADC0CN.5) Y N EADC0 PADC0
(EIE1.2) (EIP1.2)
CF (PCA0CN.7)
Y N EPCA0 PPCA0
CCFn (PCA0CN.n)
(EIE1.3) (EIP1.3)
COVF (PCA0PWM.6)
CP0FIF (CPT0CN.4) N N ECP0
PCP0
CP0RIF (CPT0CN.5)
(EIE1.4) (EIP1.4)
CP1FIF (CPT1CN.4) N N ECP1
PCP1
CP1RIF (CPT1CN.5)
(EIE1.5) (EIP1.5)
TF3H (TMR3CN.7) N N ET3
PT3
TF3L (TMR3CN.6)
(EIE1.6) (EIP1.6)
LIN0INT (LINST.3) N N* ELIN0 PLIN0
(EIE1.7) (EIP1.7)
N/A
N/A N/A EREG0 PREG0
(EIE2.0) (EIP2.0)
CAN0INT
N Y ECAN0 PCAN0
(CAN0CN.7)
(EIE2.1) (EIP2.1)
None
N/A N/A EMAT PMAT
(EIE2.2) (EIP2.2)
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Rev. 1.2