C8051F58X Datasheet, PDF (314/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
28.2. PCA0 Interrupt Sources
Figure 28.3 shows a diagram of the PCA0 interrupt tree. There are five independent event flags that can
be used to generate a PCA0 interrupt. They are as follows: the main PCA0 counter overflow flag (CF),
which is set upon a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can
be set on an overflow from the 8th, 9th, 10th, or 11th bit of the PCA0 counter, and the individual flags for
each PCA0 channel (CCF0, CCF1, CCF2, CCF3, CCF4 and CCF5), which are set according to the opera-
tion mode of that module. These event flags are always set when the trigger condition occurs. Each of
these flags can be individually selected to generate a PCA0 interrupt, using the corresponding interrupt
enable flag (ECF for CF, ECOV for COVF, and ECCFn for each CCFn). PCA0 interrupts must be globally
enabled before any individual interrupt sources are recognized by the processor. PCA0 interrupts are glob-
ally enabled by setting the EA bit and the EPCA0 bit to logic 1.
(for n = 0 to 2)
PCA0CPMn
P ECCMT P E
WCA A AOWC
MOP P TGMC
1 MPN n n n F
6nnn
n
n
PCA0 Counter/Timer 8,
9, 10 or 11-bit Overflow
PCA0 Counter/Timer 16-
bit Overflow
PCA Module 0
(CCF0)
PCA0CN
CCCCCCCC
FRCCCCCC
FFFFFF
543210
PCA0MD
C WW
I DD
DT L
L EC
K
CCCE
PPPC
SSSF
210
ECCF0
0
1
0
1
PCA Module 1
(CCF1)
ECCF1
0
1
PCA Module 2
(CCF2)
ECCF2
0
1
PCA Module 3
(CCF3)
PCA Module 4
(CCF4)
PCA Module 5
(CCF5)
ECCF3
0
1
ECCF4
0
1
ECCF5
0
1
PCA0PWM
ACE
CC
ROC
LL
S VO
SS
EFV
EE
L
LL
10
0
1
Set 8, 9, 10, or 11 bit Operation
EPCA0
EA
0
1
Figure 28.3. PCA0 Interrupt Block Diagram
0 ^Interrupt
Priority
1
Decoder
314
Rev. 1.2