C8051F58X Datasheet, PDF (111/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFRNEXT
popped to
SFRPAGE
SFRLAST
popped to
SFRNEXT
SFR Page 0x0
Automatically
popped off of the
stack on return from
interrupt
0xC
(CAN0)
0x0
(SPI0DAT)
SFRPAGE
SFRNEXT
SFRLAST
Figure 13.5. SFR Page Stack Upon Return From PCA Interrupt
On the execution of the RETI instruction in the CAN0 ISR, the value in SFRPAGE register is overwritten
with the contents of SFRNEXT. The CIP-51 may now access the SPI0DAT register as it did prior to the
interrupts occurring. See Figure 13.6.
Rev. 1.2
111