C8051F58X Datasheet, PDF (103/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
The IFBANK bits select which of the upper banks are used for code execution, while the COBANK bits
select the bank to be used for direct writes and reads of the Flash memory. On the C8051F580/1/2/3/8/9
devices, the upper 1024 bytes of the memory in Bank 3 (0xFC00 to 0xFFFF) are reserved and are not
available for user program or data storage.
Figure 12.2 show the Flash as a consecutive block of address space using a 17-bit address to illustrate the
location of the lock byte, lock byte page and reserved space.
C8051F580/1/2/3/8/9
Reserved Area
Lock Byte
Lock Byte Page
0x1FFFF
0x1FC00
0x1FBFF
0x1FBFE
0x1FA00
C8051F584/5/6/7-F590/1
Lock Byte
Lock Byte Page
0x17FFF
0x17FFE
0x17E00
Flash Memory Space
(128 kB Flash Device)
Flash Memory Space
(96 kB Flash Device)
0x00000
Figure 12.2. Flash Program Memory Map
0x00000
Internal
Address IFBANK = 0
0xFFFF
IFBANK = 1
IFBANK = 2
IFBANK = 3
Bank 0
Bank 1
Bank 2
Bank 3
0x8000
0x7FFF
Bank 0
Bank 0
Bank 0
Bank 0
0x0000
Figure 12.3. Address Memory Map for Instruction Fetches
Rev. 1.2
103