C8051F58X Datasheet, PDF (309/356 Pages) Silicon Laboratories – Programmable hysteresis and response time Configurble as interrupt or reset source Low current

C8051F58x/F59x
SFR Definition 27.19. TMRnCF: Timer 4 and 5 Configuration
Bit
7
6
5
4
3
2
1
0
Name
TnM[1:0]
TOGn
TnOE DCENn
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Reset
0
0
0
0
0
0
0
0
TMR4CF SFR Address = 0xC9; TMR5CF SFR Address = 0x96; SFR Page = 0x10;
Bit Name
Function
7:5 Reserved Must Write 000b.
4:3 TnM[1:0] Timer 4 and 5 Clock Mode Select Bits.
00: Timer clock is SYSCLK / 12.
01: Timer clock is SYSCLK.
10: Timer clock is External Clock / 8 (synchronized to system clock).
11: Timer clock is SYSCLK / 2.
2
TOGn Timer 4 and 5 Toggle Output State.
When Timer 4 or 5 are used to toggle a port pin, this bit can be used to read the state
of the output or can be written to force the state of the output.
1
TnOE Timer 4 and 5 Output Enable.
This bit enables the timer to output a 50% duty cycle output to the timer’s assigned
external port pin.
The Timer is configured for Square Wave Output as follows:
CPRLn = 0.
CTn = 0.
TnOE = 1.
Load TMRnCAPH:TMRnCAPL.
0: Output of toggle mode not available at Timer’s assigned port pin.
1: Output of toggle mode available at Timer’s assigned port pin.
0 DCENn Decrement Enable.
This bit enables the timer to count up or down as determined by the state of TnEX.
0: Timer will count up, regardless of the state of TnEX.
1: Timer will count up or down, depending on the state of TnEX as follows:
If TnEx = 0, the timer counts down.
If TnEx = 1, the timer counts up.
Rev. 1.2
309