JN517X Datasheet, PDF (83/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
C13
100 nF
n.c. n.c. n.c.
C14
12 pF
C8
12 pF
C7
100 nF
C5
10 nF
V_DD
Y1
32 MHz
C16
10 μF
IC1
DIO15
1
DIO17 ₂
DIO18 ₃
RESET_N
4
XTAL_OUT
5
XTAL_IN
6
VB_SYNTH
7
VB_VCO
8
V_{DDA 9}
C6
IBIAS ₁₀
100 nF
R1
43 kΩ
1%
VSSA (paddle)
30 ^VDDD
29 ^DIO10
28 ^DIO9
27 ^DIO8
DIO7
26
25 ^DIO6
24 ^DO1(1)
23 ^DO0(2)
DIO5
22
21 ^DIO4
UART0
V_DD
C9
100 nF
To coaxial socket
or integrated antenna
L1
50 ohms line
4.3 nH
C1
1.8 pF
L2
3 nH
C2
1.8 pF
C3
100 nF
C4
47 pF
aaa-018140
In that configuration, an external low ohmic supply voltage shall be delivered to V_DDA and V_DDD pins. V_DDA and V_DDD voltages
shall be minimum 2.0 V and maximum 3.6 V, the supply source shall be connected directly to the device pins without any serial
resistor.
To ease the layout implementation and improve the GND plane pins 31,32 and 34 can be connected to GND.
(1) The JN517x will enter UART programming mode if SPIMISO (DO1) pin 24 is low after RESET.
(2) The JN517x will enter JTAG programming mode if SPICLK (DO0) pin 23 is low after RESET.
Fig 55. JN517x module reference design using low voltage supply
Table 38. Components
Component Function
Value
C1
RF matching capacitor 1 pF
C2
AC coupling
1.8 pF
C3
VB RF decoupling
100 nF
C4
VB RF decoupling
47 pF
C5
VB VCO decoupling
10 nF
C6
analog power decoupling 100 nF
C7
VB synth decoupling
100 nF
C8
crystal load capacitance 12 pF  5 % COG
C9
digital power decoupling 100 nF
Remarks
COG type
[1] _{COG type}
locate less than 5 mm from IC1 pin 12 and IC1 pin 14
locate less than 5 mm from IC1 pin 12 and IC1 pin 14
locate less than 5 mm from IC1 pin 8
locate less than 5 mm from IC1 pin 9
locate less than 5 mm from IC1 pin 7
adjacent to pin 6 and Y1 pin 3
adjacent to pin 5 and IC1 pin 30
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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