JN517X Datasheet, PDF(72/100 Page) NXP Semiconductors

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JN517X Datasheet, PDF (72/100 Pages) NXP Semiconductors – Supports multiple network stacks

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NXP Semiconductors

JN517x

IEEE802.15.4 Wireless Microcontroller

14.3.5 Wake-up timings

Table 24.

Symbol

tstartup

Wake-up timings

Parameter

start-up time

twake

wake-up time

Conditions

CPU start up time; time for crystal to stabilize

ready to run CPU; reached oscillator amplitude

threshold. Default bias current

radio start-up time; time for crystal to stabilize

ready for radio activity

from reset RESET_N pin, BOR or SVM

from deep sleep mode or sleep mode without

RAM retention

from sleep mode with RAM retention

from CPU Doze mode

Min Typ Max Unit

0.87 -

1.10 -

310 -

ïs

300 -

ïs

210 -

ïs

14.3.6 Band gap reference

Table 25. Band gap reference

VDD = 2 V to 3.6 V; unless otherwise specified.

Symbol Parameter

Conditions

VDDA(bg)

band gap analog

supply voltage

Min Typ Max Unit

1.198 1.235 1.260 V

14.3.7 Analog to Digital Converters

Table 26. Analog to Digital Converters

VDD = 3 V; Vref = 1.2 V; Tamb = -40 ï°C to +125 ï°C; unless otherwise specified.

Symbol Parameter

Conditions

input voltage

switchable

Vref

reference voltage

internal

external; allowable range into VREF pin

IADCx

INL

DNL

current on pins ADCx[3]

integral non-linearity

differential non-linearity

Tamb = ï40 ï°C to +85 ï°C

Tamb = ï40 ï°C to +125 ï°C

fclk(int)

offset error

gain error

internal clock frequency

0 to Vref range

0 to 2 ï´ Vref range

0 to Vref range

0 to 2 ï´ Vref range

16 MHz input clock

ï¸ 16

ï¸ 32

ï¸ 64

tconv

conversion time

programmable

Ci(a)

analog input capacitance in series with 5 kï resistor

[1] See Section 9.16.1.1.

[2] See Section 14.3.6.

Min

[1] 0.04

[2] -

[4]

9.5

Typ

1.2

400

ï±1.6

ï±1.8

ï±0.5

ï10

ï20

ï10

ï20

0.5

0.25

Max

2Vref

148

Unit

ïA

LSB

MHz

ïs

JN517X

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2.0 â 8 November 2016

72 of 100

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