JN517X Datasheet, PDF (13/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
There are 6 ADC inputs and a pair of comparator inputs. ADC0 has a designated input pin
but ADC1 uses the same pin as VREF, invalidating its use as an ADC pin when an
external reference voltage is required. The remaining 4 ADC channels are shared with the
digital IOs DIO0, DIO1, DIO2 and DIO3. When these 4 ADC channels are selected, the
corresponding DIOs must be configured as inputs with their pull-ups disabled. Similarly,
the comparator shares pins 2 and 3 with DIO17 and DIO18, so when the comparator is
selected these pins must be configured as inputs with their pull-ups disabled. The analog
IO pins on the JN517x can have signals applied up to 0.3 V higher than V_DDA. A
schematic view of the analog IO cell is shown in Figure 4. Figure 5 demonstrates a special
case, where a digital IO pin doubles as an input to analog devices. This applies to ADC2,
ADC3, ADC4, ADC5, COMP1P and COMP1M.
In reset, sleep and deep sleep, the analog peripherals are all OFF. In sleep, the
comparator may optionally be used as a wake-up source.
On platform with higher power (e.g. light Bulb, Smart Plug), unused ADC and comparator
inputs should not be left unconnected, but connected to analog ground.
V_DDA
ANALOG
PERIPHERAL
analog
I/O pin
Fig 4. Analog IO cell
V_SSA
aaa-017249
8.2.6 Digital Input Output (DIO)
When used in their primary function, all DIO pins are bidirectional and are connected to
weak internal pull-up or pull-down resistors (50 k nominal) that can be disabled. When
used in their secondary function (selected when the appropriate peripheral block is
enabled through software library calls), their direction is fixed by the function. The pull-up
or pull-down resistor is enabled or disabled independently of the function and direction;
the default state from reset is enabled.
A schematic view of the DIO cell is in Figure 5. The dotted lines through resistor R_ESD
represent a path that exists only on DIO0, DIO1, DIO2, DIO3, DIO17 and DIO18 which are
also inputs to the ADC (ADC2, ADC3, ADC4, ADC5) and comparator (COMP1P,
COMP1M) respectively. To use these DIO pins for their analog functions, the DIO must be
set as an input with its pull-up resistor, R_PU, disabled.
The DIO4 and DIO5 are different from other DIOs, as these have DIO and I²C-bus mode.
In I²C-bus mode, DIO4 and DIO5 are true open-drain with “in-built” glitch filter enabled. A
schematic view of DIO4 and DIO5 cells is shown in Figure 6.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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