JN517X Datasheet, PDF (57/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
mode can be used where a new number is generated approximately every 0.25 ms. In
either mode of operation, an interrupt can be generated to indicate when the number is
available, or a status bit can be polled.
The random bits are generated by sampling the state of the 32 MHz clock every 32 kHz
system clock edge. As these clocks are asynchronous to each other, each sampled bit is
unpredictable and hence random.
9.16 Analog peripherals
The JN517x contains a number of analog peripherals allowing the direct connection of a
wide range of external sensors and switches.
chip boundary
supply voltage
(V_DDD)
Vref
Vref select
ADC0
VREF/ADC1
ADC2
ADC3
ADC4
ADC5
COMP1P
temp
sensor
ADC
COMP1M
comparator 1
processor bus
aaa-015463
Fig 43. Analog peripherals
In order to provide good isolation from digital noise, the analog peripherals and radio are
powered by the radio regulator, which is supplied from the analog supply V_DDA and
referenced to analog ground V_SSA.
A reference signal V_ref for the ADC can be selected between an internal band gap
reference or an external voltage reference supplied to the VREF pin. ADC input 1 cannot
be used if an external reference is required, as this uses the same pin as VREF. The
ADC4, ADC3, ADC5 and ADC2 use the same pins as DIO0, DIO1, DIO2 and DIO3
respectively. These pins can only be used for the ADC if they are not required for any of
their alternative functions. Similarly, the comparator inputs are shared with DIO17 and
DIO18. If used for their analog functions, these DIOs must be put into a passive state by
setting them to Inputs with their pull-ups disabled.
The ADC is clocked from a common clock source derived from the 16 MHz clock
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
57 of 100