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JN517X Datasheet, PDF (79/100 Pages) NXP Semiconductors – Supports multiple network stacks
NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
Table 37. Radio transceiver characteristics: +125 C …continued
VDD = 2 V to 3.6 V; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max
ch
channel rejection
1 % PER, with wanted signal 3 dB, above sensitivity as per 802.15.4
modulated interferer[1][2]
1 channel
-
18 -
+1 channel
-
31 -
2 channel
-
38 -
+2 channel
-
42 -
co-channel
-
7 -
ib
in-band rejection
1 % PER with wanted signal 3 dB above
[1] -
41 -
sensitivity; 2.4 GHz to 2.4835 GHz;
modulated interferers at 3 channel
separation
oob
out-of-band rejection 1 % PER with wanted signal 3 dB above
[1] -
42 -
sensitivity; all frequencies except wanted/2
which is 8 dB lower
Psp(RX)
receiver spurious power measured conducted into 50 
30 MHz to 1 GHz
-
-
70
1 GHz to 12 GHz
-
-
70
PL(lo)
local oscillator leakage
power
-
-
56
IMP
intermodulation
protection
1 % PER at with wanted signal 3 dB above
[1] -
sensitivity; modulated interferers at 3 and 6
channel separation
45 -
RSSI
RSSI variation
95 dBm to 10 dBm; available through
JN517x Integrated Peripherals API
-
4 -
Transmitter
Po
Po(cr)
output power
control range output
power
PA = 5 and Att. 2.5 dB OFF
in 6 major steps and then 4 fine steps
[3]
[4] -
- 10 -
42 -
Psp(TX)
transmitter spurious
power
measured conducted into 50 
30 MHz to 1 GHz
-
-
65
1 GHz to 12.5 GHz (harmonic H2)
-
-
36
exceptions
1.8 GHz to 1.9 GHz
-
-
65
5.15 GHz to 5.3 GHz
-
-
65
EVM
error vector magnitude at maximum output power
-
8
-
EVMoffset error vector magnitude at maximum output power
offset
-
3
-
PSD
power spectral density relative density at greater than 3.5 MHz
offset
[5] -
38 -
absolute density at greater than 3.5 MHz
offset
[5] -
32 -
Unit
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dB
dB
dBm
dB
dBm
dBm
dBm
dBm
%
%
dBc
dBm
[1] Blocker rejection is defined as the value, when 1 % PER is seen with the wanted signal 3 dB above sensitivity, as per IEE802.15.4.
[2] Channels 11, 17, 24 low/high values reversed.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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