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JN517X Datasheet, PDF (14/100 Pages) NXP Semiconductors – Supports multiple network stacks
NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
Pu
IE
I
RPU
RPROT
RDN
ADC or
COMP1 input
VDDD
RESD
DIOx(1) Pin
Pd
O
VSS
VSS
OE
aaa-015437
(1) With x = 0, 1, 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17 or 18.
Fig 5. DIO (other than DIO4 and DIO5) pin equivalent schematic
Pu
IE
RPU
RPROT
I
I_filter
RDN
VSS
Pd
O
VSS
VSS
VDDD
DIO4/5 Pin
OE
aaa-015438
Fig 6. DIO4 and DIO5 pin equivalent schematic
In reset, the digital peripherals are all OFF and the DIO pins are set as high-impedance
inputs. During sleep and deep sleep, the DIO pins retain both their input/output state and
output level that was set as sleep commences. If the DIO pins were enabled as inputs and
the interrupts were enabled, then these pins may be used to wake up the JN517x from
sleep or deep sleep.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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