JN517X Datasheet, PDF (73/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
[3] With x = 1, 2, 3, 4, 5 or 6.
[4] Number of internal clock periods to sample input (programmable at 2, 4, 6 or 8).
14.3.8 Comparator
Table 27. Comparator
V_DD = 2 V to 3.6 V; T_amb = 40 °C to +125 C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
t_resp
response time
operating mode
low-power mode
[1] _-
90
-
ns
[2] _-
2.2 -
ns
t_res(tot)
total response time
operating mode; including delay to interrupt ^[3] -
130 -
ns
controller
V_hys
hysteresis voltage
programmable in 3 steps
-
10
-
mV
-
20
-
mV
-
40
-
mV
V_ref
reference voltage
[4] _-
-
-
V
V_I(cm)
common-mode input
voltage
0
-
V_DD
V
I_I
input current
operating mode
low-power mode
-
73
-
A
-
0.8 -
A
[1] 250 mV overdrive; 10 pF load.
[2] 250 mV overdrive; no digital delay.
[3] Digital delay can be up to a maximum of two 16 MHz clock periods.
[4] See Section 14.3.6.
14.3.9 32 kHz RC oscillator
Table 28. 32 kHz RC oscillator
V_DD = 2 V to 3.6 V; T_amb = 40C to +125C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ Max Unit
f_xtal
crystal frequency 32 kHz clock uncalibrated accuracy; without
accuracy
temperature and voltage variation
[1] _{32  21% 32}
32 + kHz
53%
calibration done in operating mode; calibrated
-
32 kHz accuracy; for a 1 s sleep period
calibrating over 20 x 32 kHz clocks periods
300 -
ppm
calibration done in low-power mode; calibrated
-
32 kHz accuracy; for a 1 s sleep period
calibrating over 20 x 32 kHz clocks periods
600 -
ppm
[1] Measured at 3 V and 25 °C.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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