JN517X Datasheet, PDF (21/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
calibration factor is derived through software, details can be found in Section 9.10.3.1.
Software must check that the 32 kHz RC oscillator is running before using it. The oscillator
has a default current consumption of around 0.5 A. Optionally, this can be reduced to
0.375 A, however, the calibrated accuracy and temperature coefficient will be worse as a
consequence. For detailed electrical specifications, see Section 14.3.9.
9.4.2.2 32 kHz External clock
An externally supplied 32 kHz reference clock on the 32KIN input (DIO7) may be provided
to the JN517x. This would allow the 32 kHz system clock to be sourced from a very stable
external oscillator module, allowing more accurate sleep cycle timings compared to the
internal RC oscillator. SPI-bus Flash can not be used in the same time than external
32 kHz crystal.
9.4.2.3 32 kHz crystal oscillator
In order to obtain more accurate sleep periods, the JN517x contains the necessary
on-chip components to build a 32 kHz oscillator with the addition of an external
32.768 kHz crystal and two tuning capacitors. The crystal should be connected between
32KXTALIN and 32KXTALOUT (DIO8 and DIO7), with two equal capacitors to ground,
one on each pin. Due to the small size of the capacitors, it is important to keep the traces
to the external components as short as possible.
The electrical specification of the oscillator can be found in Section 14.3.10. The oscillator
cell is flexible and can operate with a range of commonly available 32.768 kHz crystals
with load capacitances from 6 pF to 12.5 pF. However, the maximum ESR of the crystal
and the supply current are both functions of the actual crystal used.
32KXTALIN
JN517x
32KXTALOUT
Fig 11. 32 kHz crystal oscillator connections
aaa-023993
9.5 Reset
A system reset initializes the device to a pre-defined state and forces the CPU to start
program execution from the reset vector. The reset process that the JN517x goes through
is as follows.
When power is first applied (on V_DDA and V_DDD supply pins) or when the external reset is
released, the high-speed RC oscillator and 32 MHz crystal oscillator are activated. After a
short wait period (approximately 13 s) while the high-speed RC starts up, and so long as
the supply voltage satisfies the default SVM threshold (2.0 V + 0.045 V hysteresis), the
internal 1.8 V regulators are turned on to power the processor and peripheral logic. The
regulators are allowed to stabilize (about 15 s) followed by a further wait (approximately
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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