English
Language : 

JN517X Datasheet, PDF (58/100 Pages) NXP Semiconductors – Supports multiple network stacks
NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
9.16.1 Analog to Digital Converter
The 10-bit ADC uses a successive approximation design to perform high accuracy
conversions as typically required in wireless sensor network applications. It has eight
multiplexed single-ended input channels: six available externally, one connected to an
internal temperature sensor, and one connected to an internal supply monitoring circuit.
9.16.1.1 Operation
The input range of the ADC can be set between 40 mV to either the reference voltage or
twice the reference voltage. The reference can be either taken from the internal voltage
reference or from the external voltage applied to the VREF pin. For example, an external
reference of 1.2 V supplied to VREF may be used to set the ADC range between 40 mV
and 2.4 V.
Table 12.
VREF
1.2 V
1.6 V
1.2 V
1.6 V
ADC maximum input range
Gain setting
0
0
1
1
Maximum input range Supply voltage range (VDD)
1.2 V
2.2 V to 3.6 V
1.6 V
2.2 V to 3.6 V
2.4 V
2.6 V to 3.6 V
3.2 V
3.4 V to 3.6 V
The input clock to the ADC is 16 MHz and can be divided down to 2 MHz, 1 MHz, 500 kHz
and 250 kHz. During an ADC conversion, the selected input channel is sampled for a fixed
period and then held. This sampling period is defined as a number of ADC clock periods
and can be programmed to 2, 4, 6 or 8. The conversion rate is ((3  sample period) + 13)
clock periods. For example, for 500 kHz conversion with sample period of 2 will be (3  2)
+ 13 = 19 clock periods, 38 s or 26.32 kHz. The ADC can be operated in either a single
conversion mode or alternatively a new conversion can be started as soon as the previous
one has completed, to give continuous conversions.
If the source resistance of the input voltage is 1 k or less, then the default sampling time
of 2 clock periods should be used. The input to the ADC can be modeled as a resistor of
5 k (typ.) and 10 k (max.) to represent the on-resistance of the switches and the
sampling capacitor 8 pF. The sampling time required can then be calculated, by adding
the sensor source resistance to the switch resistance, multiplying by the capacitance
giving a time constant. Assuming normal exponential RC charging, the number of time
constants required to give an acceptable error can be calculated, seven time constants
gives an error of 0.091 %, so for 10-bit accuracy, seven time constants should be the
target. For a source with zero resistance, seven time constants are 640 ns, hence the
smallest sampling window of 2 clock periods can be used.
$'&
SLQ
Fig 44. ADC input equivalent circuit
VDPSOH
VZLWFK
$'&
)5217
(1'
S)
DDD
The ADC sampling period, input range and mode (single shot or continuous) are
controlled through software.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
58 of 100