JN517X Datasheet, PDF (12/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
[1] P = power supply; G = ground; I = input, O = output; IO = input/output.
[2] JTAG programming mode: must be left floating high during reset to avoid entering JTAG programming mode.
[3] UART programming mode: leave pin floating high during reset to avoid entering UART programming mode or hold it low to program.
[4] Specific precautions have to be followed for UART flow control: CTS0 is not usable in the same time with SPISEL0.
[5] Specific precautions have to be followed if external 32 kHz crystal is used. SPI-bus Flash can not be used in the same time than external
32 kHz crystal.
8.2.1 Power supplies
The V_DDA and V_DDD pins are decoupled with a 100 nF ceramic capacitor. V_DDA is the
power supply to the analog circuitry; it should be decoupled to ground. V_DDD is the power
supply for the digital circuitry; and should also be decoupled to ground. In addition, a
common 10 F tantalum capacitor is required to filter out low frequencies noise on the
power supply pins. Decoupling pins for the internal 1.8 V regulators are provided which
each requires a100 nF capacitor located as close to the device as practical. VB_SYNTH
and VB_DIG require only a 100 nF capacitor. VB_RF1 and VB_RF2 should be connected
together as close to the device as practical, and require one 100 nF capacitor and one
47 pF capacitor. The pin VB_VCO requires a 10 nF capacitor. Refer to Figure 55 for the
schematic diagram.
V_SSA and V_SS are the ground pins.
Users are strongly discouraged from connecting their own circuits to the 1.8 V regulated
supply pins, as the regulators have been optimized to supply only enough current for the
internal circuits.
8.2.2 Reset
RESET_N is an active low reset input pin that is connected to an internal pull-up resistor
see Table 19. It may be pulled low by an external circuit. Refer to Section 9.5.2 for more
details.
8.2.3 32 MHz oscillator
A crystal is connected between XTAL_IN and XTAL_OUT to form the reference oscillator,
which drives the system clock. A capacitor to analog ground is required on each of these
pins. Refer to Section 9.4.1 for more details. The 32 MHz reference frequency is divided
down to 16 MHz and this is used as the system clock throughout the device.
8.2.4 Radio
The radio is a single ended design, requiring only a capacitor and just 2 inductors to
match a 50  microstrip line to the RF_IO pin. In addition, extra-components are added
on the line for filtering purpose.
An external resistor (43 k) is required between IBIAS and analog ground (paddle) to set
various bias currents and references within the radio.
8.2.5 Analog peripherals
The ADC requires a reference voltage to use as part of its operation. It can use either an
internal reference voltage or an external reference connected to VREF. This voltage is
referenced to analog ground and the performance of the analog peripherals is dependent
on the quality of this reference.
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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