JN517X Datasheet, PDF (18/100 Pages) NXP Semiconductors – Supports multiple network stacks

NXP Semiconductors
JN517x
IEEE802.15.4 Wireless Microcontroller
JN517x
SPISEL0
SPIMISO
SPIMOSI
SPICLK
SS
SDO
SDI
CLK
serial
memory
Fig 8. Connecting external serial memory
aaa-021453
The contents of the external serial memory may be encrypted. The AES security
processor combined with a user programmable 128-bit encryption key is used to encrypt
the contents of the external memory. The encryption key is stored in the Flash memory
index section. When bootloading program code from external serial memory, the JN517x
automatically accesses the encryption key to execute the decryption process, which is
transparent to the user, user program code does not need to handle any part of the
decryption process; it is transparent. For more details, including the how the program
code encrypts data for the external memory, refer to Application Note Boot loader
Operation JN-AN-1003 on the Wireless Connectivity area of the NXP web site Ref. 2.
Remark: SPI-bus Flash can not be used in the same time than external 32 kHz crystal.
9.3.6 Peripherals
All peripherals have their registers mapped into the memory space. Applications have
access to the peripherals through the software libraries that present a high-level view of
the peripheral's functions through a series of dedicated software routines. These routines
provide both a tested method for using the peripherals and allow bug-free application
code to be developed more rapidly. For details, see JN517x Integrated Peripherals API
User Guide JN-UG-3118 on the Wireless Connectivity area of the NXP web site Ref. 2.
9.4 System clocks
Two system clocks are used to drive the on-chip subsystems of the JN517x. The wake-up
timers are driven from a low frequency clock (notionally 32 kHz). All other subsystems
(transceiver, processor, memory and digital and analog peripherals) are driven by a
high-speed clock (notionally 32 MHz), or a divided-down version of it.
The high-speed clock is either generated by the accurate crystal-controlled oscillator
(32 MHz) or the less accurate high-speed RC oscillator (27 MHz to 32 MHz calibrated).
The low-speed clock is either generated by the less accurate RC oscillator (centered on
32 kHz) or can be supplied externally.
9.4.1 High-speed (32 MHz) system clock
The selected high-speed system clock is used directly by the radio subsystem, whereas a
divided-by-two version is used by the remainder of the transceiver and the digital and
analog peripherals. The direct or divided down version of the clock is used to drive the
processor and memories (32 MHz, 16 MHz, 8 MHz, 4 MHz, 2 MHz or 1 MHz).
JN517X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.0 — 8 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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