MC68HC08AS32 Datasheet, PDF (61/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Mask Options
Mask Option Register
LVIPWR — LVI Power Enable Bit
LVIPWR enables the LVI module. (See Section 10. Low-Voltage
Inhibit (LVI).)
1 = LVI module power enabled
0 = LVI module power disabled
SSREC — Short Stop Recovery Bit
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay. (See
16.6.2 Stop Mode.)
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
NOTE: If using an external crystal oscillator, do not set the SSREC bit.
COPRS — COP Rate Select Timeout Bit
COPS selects the short COP timeout period. (See Section 13.
Computer Operating Properly (COP).)
1 = COP timeout period is 2¹³â€“2⁴ CGMXCLK cycles.
0 = COP timeout period is 2¹⁸–2⁴ CGMXCLK cycles.
STOP — STOP Instruction Enable Bit
STOP enables the STOP instruction.
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
COPD — COP Disable Bit
COPD disables the COP module. (See Section 13. Computer
Operating Properly (COP).)
1 = COP module disabled
0 = COP module enabled
MC68HC08AS32 — Rev. 3.0
MOTOROLA
Mask Options
Advance Information
61