MC68HC08AS32 Datasheet, PDF (351/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Byte Data Link Controller-Digital (BDLC-D)
BDLC Protocol Handler
20.6.5.5 Summary
Table 20-2. BDLC J1850 Bus Error Summary
Error Condition
Transmission Error
Cyclical Redundancy Check (CRC)
Error
Invalid Symbol: BDLC Receives
Invalid Bits (Noise)
Framing Error
Bus Short to V_DD
Bus Short to GND
BDLC Receives BREAK Symbol.
BDLC Function
For invalid bits or framing symbols on
non-byte boundaries, invalid symbol
interrupt will be generated. BDLC stops
transmission.
CRC error interrupt will be generated. The
BDLC will wait for SOF.
The BDLC will abort transmission
immediately. Invalid symbol interrupt will
be generated.
Invalid symbol interrupt will be generated.
The BDLC will wait for start-of-frame
(SOF).
The BDLC will not transmit until the bus is
idle.
Thermal overload will shut down physical
interface. Fault condition is reflected in
BSVR as an invalid symbol.
The BDLC will wait for the next valid SOF.
Invalid symbol interrupt will be generated.
MC68HC08AS32 — Rev. 3.0
MOTOROLA
Byte Data Link Controller-Digital (BDLC-D)
Advance Information
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