MC68HC08AS32 Datasheet, PDF (229/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Timer Interface (TIM)
I/O Registers
MSxA — Mode Select Bit A
When ELSxB–ELSxA ≠ 00, this read/write bit selects either input
capture operation or unbuffered output compare/PWM operation.
(See Table 16-3.)
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
When ELSxB–ELSxA = 00, this read/write bit selects the initial output
level of the TCHx pin once PWM, input capture, or output compare
operation is enabled. (See Table 16-3.) Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E or port F, and pin PTEx/TCHx or pin PTFx/TCHx is available
as a general-purpose I/O pin. However, channel x is at a state
determined by these bits and becomes transparent to the respective
pin when PWM, input capture, or output compare mode is ena
bled. Table 16-3 shows how ELSxB and ELSxA work. Reset clears
the ELSxB and ELSxA bits.
MC68HC08AS32 — Rev. 3.0
MOTOROLA
Timer Interface (TIM)
Advance Information
229