MC68HC08AS32 Datasheet, PDF (138/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

System Integration Module (SIM)
Figure 9-12 and Figure 9-13 show the timing for wait recovery.
IAB
$6E0B
$6E0C $00FF $00FE $00FD $00FC
IDB $A6 $A6
$A6
$01
$0B
$6E
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin or CPU interrupt or break interrupt
Figure 9-12. Wait Recovery from Interrupt or Break
IAB
$6E0B
32
CYCLES
32
CYCLES
IDB $A6 $A6
$A6
RST
CGMXCLK
RSTVCTH RSTVCTL
Figure 9-13. Wait Recovery from Internal Reset
9.7.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and
CGMXCLK) in stop mode, stopping the CPU and peripherals. Stop
recovery time is selectable using the short stop recovery (SSREC) bit in
the MOR register ($001F). If SSREC is set, stop recovery is reduced
from the normal delay of 4096 CGMXCLK cycles down to 32. This is
Advance Information
138
System Integration Module (SIM)
MC68HC08AS32 — Rev. 3.0
MOTOROLA