MC68HC08AS32 Datasheet, PDF (216/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Timer Interface (TIM)
control register (TSC3) is unused. While the MS2B bit is set, the channel
3 pin, PTF1/TCH3, is available as a general-purpose I/O pin.
Channels 4 and 5 can be linked to form a buffered PWM channel whose
output appears on the PTF2/TCH4 pin. The TIM channel registers of the
linked pair alternately control the pulse width of the output.
Setting the MS4B bit in TIM channel 4 status and control register (TSC4)
links channel 4 and channel 5. The TIM channel 4 registers initially
control the pulse width on the PTF2/TCH4 pin. Writing to the TIM
channel 5 registers enables the TIM channel 5 registers to
synchronously control the pulse width at the beginning of the next PWM
period. At each subsequent overflow, the TIM channel registers (4 or 5)
that control the pulse width are the ones written to last. TSC4 controls
and monitors the buffered PWM function, and TIM channel 5 status and
control register (TSC5) is unused. While the MS4B bit is set, the channel
5 pin, PTF3/TCH5, is available as a general-purpose I/O pin.
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
16.4.4.3 PWM Initialization
To ensure correct operation when generating unbuffered or buffered
PWM signals, use the following initialization procedure:
1. In the TIM status and control register (TSC):
a. Stop the TIM counter by setting the TIM stop bit, TSTOP.
b. Reset the TIM counter by setting the TIM reset bit, TRST.
2. In the TIM counter modulo registers (TMODH–TMODL), write the
value for the required PWM period.
3. In the TIM channel x registers (TCHxH–TCHxL), write the value
for the required pulse width.
Advance Information
216
Timer Interface (TIM)
MC68HC08AS32 — Rev. 3.0
MOTOROLA