MC68HC08AS32 Datasheet, PDF (140/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

System Integration Module (SIM)
9.8 SIM Registers
The SIM has three memory mapped registers.
9.8.1 SIM Break Status Register
The SIM break status register contains a flag to indicate that a break
caused an exit from stop mode or wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
R
R
R
R
R
R
SBSW
R
Write:
Reset:
0
R = Reserved
Figure 9-16. SIM Break Status Register (SBSR)
SBSW — SIM Break Stop/Wait Bit
This status bit is useful in applications requiring a return to wait mode
or stop mode after exiting from a break interrupt. Clear SBSW by
writing a logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode exited by break interrupt
0 = Stop mode or wait mode not exited by break interrupt
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this. Writing 0 to the SBSW bit
clears it.
Advance Information
140
System Integration Module (SIM)
MC68HC08AS32 — Rev. 3.0
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