MC68HC08AS32 Datasheet, PDF (113/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Clock Generator Module (CGM)
Interrupts
NOTE: The multiplier select bits have built-in protection that prevents them from
being written when the PLL is on (PLLON = 1).
VRS[7:4] — VCO Range Select Bits
These read/write bits control the hardware center-of-range linear
multiplier, L, which controls the hardware center-of-range frequency,
f_VRS, (see 8.4.2 Phase-Locked Loop Circuit (PLL)). VRS[7:4] cannot
be written when the PLLON bit in the PLL control register (PCTL) is
set. (See 8.4.2.5 Special Programming Exceptions.) A value of $0
in the VCO range selects bits, disables the PLL, and clears the BCS
bit in the PCTL. (See 8.4.3 Base Clock Selector Circuit and 8.4.2.5
Special Programming Exceptions for more information.) Reset
initializes the bits to $6 to give a default range multiply value of 6.
NOTE:
The VCO range select bits have built-in protection that prevents them
from being written when the PLL is on (PLLON = 1) and prevents
selection of the VCO clock as the source of the base clock (BCS = 1) if
the VCO range select bits are all clear.
The VCO range select bits must be programmed correctly. Incorrect
programming can result in failure of the PLL to achieve lock.
8.7 Interrupts
When the AUTO bit is set in the PLL bandwidth control register (PBWC),
the PLL can generate a CPU interrupt request every time the LOCK bit
changes state. The PLLIE bit in the PLL control register (PCTL) enables
CPU interrupts from the PLL. PLLF, the interrupt flag in the PCTL,
becomes set whether interrupts are enabled or not. When the AUTO bit
is clear, CPU interrupts from the PLL are disabled and PLLF reads as
logic 0.
Software should read the LOCK bit after a PLL interrupt request to see
if the request was due to an entry into lock or an exit from lock. When the
PLL enters lock, the VCO clock, CGMVCLK, divided by two can be
selected as the CGMOUT source by setting BCS in the PCTL. When the
PLL exits lock, the VCO clock frequency is corrupt, and appropriate
precautions should be taken. If the application is not frequency sensitive,
MC68HC08AS32 — Rev. 3.0
MOTOROLA
Clock Generator Module (CGM)
Advance Information
113