MC68HC08AS32 Datasheet, PDF (360/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Byte Data Link Controller-Digital (BDLC-D)
The BDLC supports the in-frame response (IFR) feature of J1850 by
setting these bits correctly. The four types of J1850 IFR are shown
below. The purpose of the in-frame response modes is to allow
multiple nodes to acknowledge receipt of the data by responding with
their personal ID or physical address in a concatenated manner after
they have seen the EOD symbol. If transmission arbitration is lost by
a node while sending its response, it continues to transmit its
ID/address until observing its unique byte in the response stream. For
VPW modulation, because the first bit of the IFR is always passive, a
normalization bit (active) must be generated by the responder and
sent prior to its ID/address byte. When there are multiple responders
on the J1850 bus, only one normalization bit is sent which assists all
other transmitting nodes to sync up their response.
HEADER
DATA FIELD
CRC
TYPE 0 — NO IFR
HEADER
DATA FIELD
CRC
NB ID
TYPE 1 — SINGLE BYTE TRANSMITTED FROM A SINGLE RESPONDER
HEADER
DATA FIELD
CRC
NB ID1
ID N
TYPE 2 — SINGLE BYTE TRANSMITTED FROM MULTIPLE RESPONDERS
HEADER
DATA FIELD
CRC
NB
IFR DATA FIELD
TYPE 3 — MULTIPLE BYTES TRANSMITTED FROM A SINGLE RESPONDER
NB = Normalization Bit
ID = Identifier (usually the physical address of the responder(s))
CRC
(OPTIONAL)
Figure 20-18. Types of In-Frame Response (IFR)
Advance Information
360
Byte Data Link Controller-Digital (BDLC-D)
MC68HC08AS32 — Rev. 3.0
MOTOROLA