MC68HC08AS32 Datasheet, PDF (137/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

System Integration Module (SIM)
Low-Power Modes
9.7 Low-Power Modes
Executing the WAIT or STOP instruction puts the MCU in a low-power
mode for standby situations. The SIM holds the CPU in a non-clocked
state. The operation of each of these modes is described below. Both
STOP and WAIT clear the interrupt mask (I) in the condition code
register, allowing interrupts to occur.
9.7.1 Wait Mode
In wait mode, the CPU clocks are inactive while one set of peripheral
clocks continues to run. Figure 9-11 shows the timing for wait mode
entry.
A module that is active during wait mode can wake up the CPU with an
interrupt if the interrupt is enabled. Stacking for the interrupt begins one
cycle after the WAIT instruction during which the interrupt occurred.
Refer to the wait mode subsection of each module to see if the module
is active or inactive in wait mode. Some modules can be programmed to
be active in wait mode.
Wait mode also can be exited by a reset or break. A break interrupt
during wait mode sets the SIM break stop/wait bit, SBSW, in the SIM
break status register (SBSR). If the COP disable bit, COPD, in the mask
option register (MOR $001F) is logic 0, then the computer operating
properly module (COP) is enabled and remains active in wait mode.
IAB
WAIT ADDR
WAIT ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
NOTE: Previous data can be operand data or the WAIT opcode, depending on the last instruction.
Figure 9-11. Wait Mode Entry Timing
MC68HC08AS32 — Rev. 3.0
MOTOROLA
System Integration Module (SIM)
Advance Information
137