MC68HC08AS32 Datasheet, PDF (302/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Serial Peripheral Interface (SPI)
18.14.1 SPI Control Register
The SPI control register:
• Enables SPI module interrupt requests
• Selects CPU interrupt requests
• Configures the SPI module as master or slave
• Selects serial clock polarity and phase
• Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
• Enables the SPI module
Address: $0010
Bit 7
6
5
4
3
2
1
Read:
SPRIE
Write:
R SPMSTR CPOL CPHA SPWOM SPE
Reset: 0
0
1
0
1
0
0
R = Reserved
Figure 18-12. SPI Control Register (SPCR)
Bit 0
SPTIE
0
SPRIE — SPI Receiver Interrupt Enable Bit
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
SPMSTR — SPI Master Bit
This read/write bit selects master mode operation or slave mode
operation. Reset sets the SPMSTR bit.
1 = Master mode
0 = Slave mode
Advance Information
302
Serial Peripheral Interface (SPI)
MC68HC08AS32 — Rev. 3.0
MOTOROLA