MC68HC08AS32 Datasheet, PDF (60/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Mask Options
The mask option register ($001F) is used in the initialization of various
options. For error free compatibility with the emulator OTP
(M68HC908AT32CFN), a write to $001F in the MC68HC08AS32 has no
effect in MCU operation.
5.4 Mask Option Register
Address: $001F
Bit 7
6
5
4
3
2
1
Read: LVISTOP ROMSEC LVIRST LVIPWR SSREC COPRS STOP
Write: R
R
R
R
R
R
R
Reset:
Unaffected by Reset
R = Reserved
Figure 5-1. Mask Option Register (MOR)
Bit 0
COPD
R
LVISTOP — LVI Stop Mode Enable Bit
LVISTOP enables the LVI module in stop mode.(See Section 10.
Low-Voltage Inhibit (LVI).)
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
ROMSEC — ROM Security Bit
ROMSEC enables the ROM security feature. Setting the ROMSEC bit
prevents reading of the ROM contents. Access to the ROM is denied
to unauthorized users of customer-specified software.
1 = ROM security enabled
0 = ROM security disabled
LVIRST — LVI Reset Enable Bit
LVIRST enables the reset signal from the LVI module. (See Section
10. Low-Voltage Inhibit (LVI).)
1 = LVI module resets enabled
0 = LVI module resets disabled
Advance Information
60
Mask Options
MC68HC08AS32 — Rev. 3.0
MOTOROLA