MC68HC08AS32 Datasheet, PDF (172/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Computer Operating Properly (COP)
13.4 I/O Signals
The following paragraphs describe the signals shown in Figure 13-1.
13.4.1 CGMXCLK
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency
is equal to the crystal frequency.
13.4.2 STOP Instruction
The STOP instruction clears the SIM counter.
13.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 13.5 COP
Control Register) clears the COP counter and clears bits 12 through 4
of the SIM counter. Reading the COP control register returns the reset
vector.
13.4.4 Internal Reset Resources
An internal reset clears the SIM counter and the COP counter. (See
9.4.2 Active Resets from Internal Sources.)
13.4.5 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
13.4.6 COPD (COP Disable)
The COPD bit reflects the state of the COP disable bit (COPD) in the
MOR register ($001F). This signal disables COP-generated resets when
asserted. (See Section 5. Mask Options.)
Advance Information
172
Computer Operating Properly (COP)
MC68HC08AS32 — Rev. 3.0
MOTOROLA