MC68HC08AS32 Datasheet, PDF (162/394 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Monitor ROM (MON)
12.4.1 Entering Monitor Mode
Table 12-1 shows the pin conditions for entering monitor mode.
Table 12-1. Mode Selection
Mode
CGMOUT
Bus
Frequency
V_DD +
V_HI⁽¹⁾
1 0 1 1 Monitor
C-----G----M-----2X----C-----L---K--- _or C-----G----M-----2V----C-----L---K---
C-----G----M---2--O-----U----T---
V_DD +
V_HI⁽¹⁾
1 0 1 0 Monitor
CGMXCLK
C-----G----M---2--O-----U----T---
1. For V_HI, see 21.5 5.0-Volt DC Electrical Characteristics Control Timing and 21.2
Maximum Ratings
Enter monitor mode by either:
• Executing a software interrupt instruction (SWI) or
• Applying a logic 0 and then a logic 1 to the RST pin
The MCU sends a break signal (10 consecutive logic 0s) to the host
computer, indicating that it is ready to receive a command. The break
signal also provides a timing reference to allow the host to determine the
necessary baud rate.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt.
The alternate vectors are in the $FE page instead of the $FF page and
allow code execution from the internal monitor firmware instead of user
code. The COP module is disabled in monitor mode as long as
V_DD + V_HI (see 21.5 5.0-Volt DC Electrical Characteristics Control
Timing) is applied to either the IRQ pin or the V_DD pin. (See Section 9.
System Integration Module (SIM) for more information on modes of
operation.)
NOTE:
Holding the PTC3 pin low when entering monitor mode causes a bypass
of a divide-by-two stage at the oscillator. The CGMOUT frequency is
equal to the CGMXCLK frequency, and the OSC1 input directly
Advance Information
162
Monitor ROM (MON)
MC68HC08AS32 — Rev. 3.0
MOTOROLA