PIC18F45K80-I Datasheet, PDF (89/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
POSTINC2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80
N/A
N/A
N/A
POSTDEC2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80
N/A
N/A
N/A
PREINC2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80
N/A
N/A
N/A
PLUSW2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80
N/A
N/A
N/A
FSR2H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---- xxxx
---- uuuu
---- uuuu
FSR2L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
STATUS
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---x xxxx
---u uuuu
---u uuuu
TMR0H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
uuuu uuuu
uuuu uuuu
TMR0L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
T0CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 1111
1111 1111
uuuu uuuu
OSCCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0110 q000
0100 00q0
uuuu uuqu
OSCCON2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -0-1 0-x0
-0-0 0-01
-u-u u-uu
WDTCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0-x0 -xx0
0-x0 -xx0
u-u0 -uu0
RCON⁽⁴⁾
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0111 11q0
0111 qquu
uuuu qquu
TMR1H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
u0uu uuuu
uuuu uuuu
TMR2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
PR2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 1111
1111 1111
uuuu uuuu
T2CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -000 0000
-000 0000
-uuu uuuu
SSPBUF
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
SSPADD
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
SSPSTAT
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
SSPCON1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
SSPCON2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
ADRESH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
ADRESL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -000 0000
-000 0000
-uuu uuuu
ADCON1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 xxxx
0000 0qqq
uuuu uuuu
ADCON2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0-00 0000
0-00 0000
u-uu uuuu
ECCP1AS
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
xxxx xxxx
CCPR1H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
TXSTA2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0010
0000 0010
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
5:
u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
See Table 5-3 for Reset value for specific conditions.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
 2010-2012 Microchip Technology Inc.
DS39977F-page 89