PIC18F45K80-I Datasheet, PDF (422/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 27-39: RXFnEIDH: RECEIVE ACCEPTANCE FILTER ‘n’ EXTENDED IDENTIFIER
REGISTERS, HIGH BYTE [0  n  15]⁽¹⁾
R/W-x
EID15
bit 7
R/W-x
EID14
R/W-x
EID13
R/W-x
EID12
R/W-x
EID11
R/W-x
EID10
R/W-x
EID9
R/W-x
EID8
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID<15:8>: Extended Identifier Filter bits
Note 1: Registers, RXF6EIDH:RXF15EIDH, are available in Mode 1 and 2 only.
REGISTER 27-40: RXFnEIDL: RECEIVE ACCEPTANCE FILTER ‘n’ EXTENDED IDENTIFIER
REGISTERS, LOW BYTE [0  n  15]⁽¹⁾
R/W-x
EID7
bit 7
R/W-x
EID6
R/W-x
EID5
R/W-x
EID4
R/W-x
EID3
R/W-x
EID2
R/W-x
EID1
R/W-x
EID0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EID<7:0>: Extended Identifier Filter bits
Note 1: Registers, RXF6EIDL:RXF15EIDL, are available in Mode 1 and 2 only.
REGISTER 27-41: RXMnSIDH: RECEIVE ACCEPTANCE MASK ‘n’ STANDARD IDENTIFIER MASK
REGISTERS, HIGH BYTE [0  n  1]
R/W-x
SID10
bit 7
R/W-x
SID9
R/W-x
SID8
R/W-x
SID7
R/W-x
SID6
R/W-x
SID5
R/W-x
SID4
R/W-x
SID3
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
SID<10:3>: Standard Identifier Mask bits or Extended Identifier Mask bits (EID<28:21>)
DS39977F-page 422
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