PIC18F45K80-I Datasheet, PDF (120/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 6-2: PIC18F66K80 FAMILY REGISTER FILE SUMMARY (CONTINUED)
Addr. File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
EA3h
EA2h
EA1h
EA0h
E9Fh
E9Eh
E9Dh
E9Ch
E9Bh
E9Ah
E99h
E98h
E97h
E96h
E95h
E94h
E93h
E92h
E91h
E90h
E90h
E8Fh
E8Eh
E8Dh
E8Ch
E8Bh
E8Ah
E89h
E88h
E87h
E86h
E85h
E84h
E83h
E82h
E81h
E80h
E80h
E7Fh
E7Eh
E7Dh
E7Ch
E7Bh
E7Ah
E79h
E78h
E77h
E76h
E75h
E74h
E73h
B2EIDH
B2SIDL
B2SIDH
B2CON
CANCON_RO8
CANSTAT_RO8
B1D7
B1D6
B1D5
B1D4
B1D3
B1D2
B1D1
B1D0
B1DLC
B1EIDL
B1EIDH
B1SIDL
B1SIDH
B1CON
B1CON
CANCON_RO9
CANSTAT_RO9
B0D7
B0D6
B0D5
B0D4
B0D3
B0D2
B0D1
B0D0
B0DLC
B0EIDL
B0EIDH
B0SIDL
B0SIDH
B0CON
B0CON
TXBIE
BIE0
BSEL0
MSEL3
MSEL2
MSEL1
MSEL0
RXFBCON7
RXFBCON6
RXFBCON5
RXFBCON4
RXFBCON3
RXFBCON2
EID15
EID14
EID13
SID2
SID1
SID0
SID10
SID9
SID8
TXBIF
TXABT
TXLARB
CANCON_RO8
CANSTAT_RO8
B1D77
B1D76
B1D75
B1D67
B1D66
B1D65
B1D57
B1D56
B1D55
B1D47
B1D46
B1D45
B1D37
B1D36
B1D35
B1D27
B1D26
B1D25
B1D17
B1D16
B1D15
B1D07
B1D06
B1D05
—
TXRTR
—
EID7
EID6
EID5
EID15
EID14
EID13
SID2
SID1
SID0
SID10
SID9
SID8
TXBIF
TXABT
TXLARB
RXFUL
RXM1
RXRTRRO
CANCON_RO9
CANSTAT_RO9
B0D77
B0D76
B0D75
B0D67
B0D66
B0D65
B0D57
B0D56
B0D55
B0D47
B0D46
B0D45
B0D37
B0D36
B0D35
B0D27
B0D26
B0D25
B0D17
B0D16
B0D15
B0D07
B0D06
B0D05
—
RXRTR
RB1
EID7
EID6
EID5
EID15
EID14
EID13
SID2
SID1
SID0
SID10
SID9
SID8
TXBIF
TXABT
TXLARB
RTXFUL
RXM1
RXRTRRO
—
—
—
CAN Buffer Interrupt Enable
Mode Select Register 0
CAN Mask Select Register 3
CAN Mask Select Register 2
CAN Mask Select Register 1
CAN Mask Select Register 0
CAN Buffer 15/14 Pointer Register
CAN Buffer 13/12 Pointer Register
CAN Buffer 11/10 Pointer Register
CAN Buffer 9/8 Pointer Register
CAN Buffer 7/6 Pointer Register
CAN Buffer 5/4 Pointer Register
EID12
SRR
SID7
TXERR
EID11
EXID
SID6
TXREQ
EID10
—
SID5
—
B1D71
B1D61
B1D51
B1D41
B1D31
B1D21
B1D11
B1D01
—
EID4
EID12
SRR
SID7
TXERR
FILHIT4
B1D73
B1D63
B1D53
B1D43
B1D33
B1D23
B1D13
B1D03
DLC3
EID3
EID11
EXID
SID6
TXREQ
FILHIT3
B1D72
B1D62
B1D52
B1D42
B1D32
B1D22
B1D12
B1D02
DLC2
EID2
EID10
—
SID5
RTREN
FILHIT2
B0D70
B0D73
B0D72
B0D60
B0D63
B0D62
B0D50
B0D53
B0D52
B0D40
B0D43
B0D42
B0D30
B0D33
B0D32
B0D20
B0D23
B0D22
B0D10
B0D13
B0D12
B0D00
B0D03
B0D02
RB0
DLC3
DLC2
EID4
EID3
EID2
EID12
EID11
EID10
SRR
EXID
—
SID7
SID6
SID5
TXERR
TXREQ
RTREN
FILHIT4
FILHIT3
FILHIT2
CAN TX Buffer Interrupt Enable
EID9
EID17
SID4
TXPRI1
B1D71
B1D61
B1D51
B1D41
B1D31
B1D21
B1D11
B1D01
DLC1
EID1
EID9
EID17
SID4
TXPRI1
FILHIT1
B0D71
B0D61
B0D51
B0D41
B0D31
B0D21
B0D11
B0D01
DLC1
EID1
EID9
EID17
SID4
TXPRI1
FILHIT1
—
—
Bit 0
EID8
EID16
SID3
TXPRI0
B1D70
B1D60
B1D50
B1D40
B1D30
B1D20
B1D10
B1D00
DLC0
EID0
EID8
EID16
SID3
TXPRI0
FILHIT0
B0D70
B0D60
B0D50
B0D40
B0D30
B0D20
B0D10
B0D00
DLC0
EID0
EID8
EID16
SID3
TXPRI0
FILHIT0
—
—
Value on
POR, BOR
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DS39977F-page 120
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