PIC18F45K80-I Datasheet, PDF(204/622 Page) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

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PIC18F45K80-I Datasheet, PDF (204/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

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PIC18F66K80 FAMILY

REGISTER 12-4: MDCARL: MODULATION LOW CARRIER CONTROL REGISTER

R/W-0

R/W-x

R/W-x

U-0

MDCLODIS MDCLPOL MDCLSYNC

â

bit 7

R/W-x

MDCL3(1)

R/W-x

MDCL2(1)

R/W-x

MDCL1(1)

R/W-x

MDCL0(1)

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

â1â = Bit is set

U = Unimplemented bit, read as â0â

â0â = Bit is cleared

x = Bit is unknown

bit 7

bit 6

bit 5

bit 4

bit 3-0

MDCLODIS: Modulator Low Carrier Output Disable bit

1 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)

is disabled

0 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)

is enabled

MDCLPOL: Modulator Low Carrier Polarity Select bit

1 = Selected low carrier signal is inverted

0 = Selected low carrier signal is not inverted

MDCLSYNC: Modulator Low Carrier Synchronization Enable bit

1 = Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high

time carrier

0 = Modulator output is not synchronized to the low time carrier signal(1)

Unimplemented: Read as â0â

MDCL<3:0> Modulator Data High Carrier Selection bits(1)

1111-1001 = Reserved

1000 = CCP5 output (PWM Output mode only)

0111 = CCP4 output (PWM Output mode only)

0110 = CCP3 output (PWM Output mode only)

0101 = CCP2 output (PWM Output mode only)

0100 = ECCP1 output (PWM Output mode only)

0011 = Reference clock module signal

0010 = MDCIN2 port pin

0001 = MDCIN1 port pin

0000 = VSS

Note 1: Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.

TABLE 12-1: SUMMARY OF REGISTERS ASSOCIATED WITH DATA SIGNAL MODULATOR MODE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MDCARH MDCHODIS MDCHPOL MDCHSYNC

â

MDCH3 MDCH2 MDCH1 MDCH0

MDCARL MDCLODIS MDCLPOL MDCLSYNC

â

MDCL3 MDCL2 MDCL1 MDCL0

MDCON

MDEN

MDOE

MDSLR MDOPOL MDO

â

â

MDBIT

MDSRC MDSODIS

â

â

â

MDSRC3 MDSRC2 MDSRC1 MDSRC0

PMD2

â

â

â

â

MODMD ECANMD CMP2MD CMP1MD

Legend: â = unimplemented, read as â0â. Shaded cells are not used in the Data Signal Modulator mode.

DS39977F-page 204

ï£ 2010-2012 Microchip Technology Inc.

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