PIC18F45K80-I Datasheet, PDF (184/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
11.5 PORTD, TRISD and
LATD Registers
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISD and LATD.
Note: PORTD is unavailable on 28-pin devices.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Note: These pins are configured as digital inputs
on any device Reset.
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
performed by setting bit, RDPU (PADCFG1<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on all device Resets.
PORTD can also be configured as an 8-bit wide micro-
processor port (Parallel Slave Port) by setting control
bit, PSPMODE (PSPCON<4>). In this mode, the input
buffers are ST. For additional information, see
Section 11.9 “Parallel Slave Port”.
RD3 has a CTMU functionality.
EXAMPLE 11-4: INITIALIZING PORTD
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0CFh
TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
DS39977F-page 184
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