PIC18F45K80-I Datasheet, PDF (377/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
24.5 Comparator Control and
Configuration
Each comparator has up to eight possible combina-
tions of inputs: up to four external analog inputs and
one of two internal voltage references.
All of the comparators allow a selection of the signal
from pin, CxINA, or the voltage from the comparator
reference (CVREF) on the non-inverting channel. This is
compared to either C1INB, CxINC, C2INB or the micro-
controller’s fixed internal reference voltage (VBG,
1.024V nominal) on the inverting channel. The compar-
ator inputs and outputs are tied to fixed I/O pins,
defined in Table 24-1. The available comparator config-
urations and their corresponding bit settings are shown
in Figure 24-4.
TABLE 24-1: COMPARATOR INPUTS AND
OUTPUTS
Comparator Input or Output I/O Pin^(†)
C1INA (VIN+)
RB0/RD0
C1INB (VIN-)
RB1/RD1
1
C1INC (VIN-)
RA1
C2INB(VIN-)
RA5/RD3
C1OUT
RB2/RE1
C2INA(VIN+)
RB4/RD2
2
C2INB(VIN-)
C2INC(VIN-)
RA5/RD3
RA2
C2OUT
RB3/RE2
† The I/O pin is dependent on package type.
24.5.1
COMPARATOR ENABLE AND
INPUT SELECTION
Setting the CON bit of the CMxCON register
(CMxCON<7>) enables the comparator for operation.
Clearing the CON bit disables the comparator, resulting
in minimum current consumption.
The CCH<1:0> bits in the CMxCON register
(CMxCON<1:0>) direct either one of three analog input
pins, or the Internal Reference Voltage (VBG), to the
comparator, VIN-. Depending on the comparator oper-
ating mode, either an external or internal voltage
reference may be used.
The analog signal present at VIN- is compared to the
signal at VIN+ and the digital output of the comparator
is adjusted accordingly.
The external reference is used when CREF = 0
(CMxCON<2>) and VIN+ is connected to the CxINA
pin. When external voltage references are used, the
comparator module can be configured to have the ref-
erence sources externally. The reference signal must
be between VSS and VDD and can be applied to either
pin of the comparator.
The comparator module also allows the selection of an
internally generated voltage reference (CVREF) from the
comparator voltage reference module. This module is
described in more detail in Section 25.0 “Comparator
Voltage Reference Module”. The reference from the
comparator voltage reference module is only available
when CREF = 1. In this mode, the internal voltage
reference is applied to the comparator’s VIN+ pin.
Note:
The comparator input pin selected by
CCH<1:0> must be configured as an input
by setting both the corresponding TRIS bit
and the corresponding ANSELx bit in the
ANCONx register.
24.5.2
COMPARATOR ENABLE AND
OUTPUT SELECTION
The comparator outputs are read through the CMSTAT
register. The CMSTAT<6> bit reads the Comparator 1
output, CMSTAT<7> reads the Comparator 2 output.
These bits are read-only.
The comparator outputs may also be directly output to
the RE2 and RE1 pins by setting the COE bit
(CMxCON<6>). When enabled, multiplexers in the
output path of the pins switch to the output of the com-
parator. While in this mode, the TRISE<2:1> bits still
function as the digital output enable bits for the RE2,
and RE1 pins.
By default, the comparator’s output is at logic high
whenever the voltage on VIN+ is greater than on VIN-.
The polarity of the comparator outputs can be inverted
using the CPOL bit (CMxCON<5>).
The uncertainty of each of the comparators is related to
the input offset voltage and the response time given in
the specifications, as discussed in Section 24.2
“Comparator Operation”.
 2010-2012 Microchip Technology Inc.
DS39977F-page 377