PIC18F45K80-I Datasheet, PDF (287/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
21.0 MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
21.1 Master SSP (MSSP) Module
Overview
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be devices such as serial EEPROMs, shift
registers, display drivers and A/D Converters. The
MSSP module can operate in either of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I²C™)
- Full Master mode
- Slave mode (with general address call)
The I²C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode with 5-bit and 7-bit address masking
(with address masking for both 10-bit and 7-bit
addressing)
21.2 Control Registers
The MSSP module has three associated control regis-
ters. These include a status register (SSPSTAT) and
two control registers (SSPCON1 and SSPCON2). The
use of these registers and their individual configuration
bits differ significantly depending on whether the MSSP
module is operated in SPI or I²C mode.
Additional details are provided under the individual
sections.
21.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDA/SDI
• Serial Clock (SCK) – RC3/REF0/SCL/SCK
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/C2INB/
HLVDIN/T1CKI/SS/CTMU1
Figure 21-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 21-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Internal
Data Bus
Read
Write
SSPBUF reg
SDI
SSPSR reg
SDO
bit 0
Shift
Clock
SS
SS Control
Enable
Edge
Select
2
Clock Select
SSPM<3:0>
SCK
SMP:CKE
2
4
( ) TMR2 Output
2
Edge
Select
Prescaler TOSC
4, 16, 64
Data to TXx/RXx in SSPSR
TRIS bit
Note: Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.
 2010-2012 Microchip Technology Inc.
DS39977F-page 287