PIC18F45K80-I Datasheet, PDF (75/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 4-3: PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
R/W-0
CCP5MD
bit 7
R/W-0
CCP4MD
R/W-0
CCP3MD
R/W-0
CCP2MD
R/W-0
CCP1MD
R/W-0
UART2MD
R/W-0
UART1MD
R/W-0
SSPMD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CCP5MD: CCP5 Module Disable bit
1 = The CCP5 module is disabled; all CCP5 registers are held in Reset and are not writable
0 = The CCP5 module is enabled
bit 6
CCP4MD: CCP4 Module Disable bit
1 = The CCP4 module is disabled; all CCP4 registers are held in Reset and are not writable
0 = The CCP4 module is enabled
bit 5
CCP3MD: CCP3 Module Disable bit
1 = The CCP3 module is disabled; all CCP3 registers are held in Reset and are not writable
0 = The CCP3 module is enabled
bit 4
CCP2MD: CCP2 Module Disable bit
1 = The CCP2 module is disabled; all CCP2 registers are held in Reset and are not writable
0 = The CCP2 module is enabled
bit 3
CCP1MD: ECCP1 Module Disable bit
1 = The ECCP1 module is disabled; all ECCP1 registers are held in Reset and are not writable
0 = The ECCP1 module is enabled
bit 2
UART2MD: EUSART2 Module Disable bit
1 = The USART2 module is disabled; all USART2 registers are held in Reset and are not writable
0 = The USART2 module is enabled
bit 1
UART1MD: EUSART1 Module Disable bit
1 = The USART1 module is disabled; all USART1 registers are held in Reset and are not writable
0 = The USART1 module is enabled
bit 0
SSPMD: MSSP Module Disable bit
1 = The MSSP module is disabled; all SSP registers are held in Reset and are not writable
0 = The MSSP module is enabled
 2010-2012 Microchip Technology Inc.
DS39977F-page 75